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張承洋 Cheng-Yang Chang 國立臺灣大學 電子工程學研究所 獲獎摘要 博士研究生 張承洋同學自 2020 年起碩士逕讀國立臺灣大學電子工程學研究所博士班,研究領域為適用於記憶 體內運算 (Computing-in-Memory, CIM) 之神經網路演算法與架構共同設計。相關研究成果發表 於 IEEE 頂尖國際會議 DAC 和頂尖國際期刊 IEEE TCAS-I、TCAD、TC。在學期間成果豐碩並獲多 項獎項肯定,難能可貴。 得獎經歷 / 專利 • 2022~2024聯詠科技教育基金會博士班獎學金 • 2020~2023 國立臺灣大學 逕行修讀博士學位獎學金 • 2022 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) 最佳學生論文獎 重要學術著作 • 2020台灣國際航電公司Garmin獎學金 • 2020 TSMC x Microsoft Careerhack 校園黑客松第一名 1. C.-Y. Chang, C.-T. Huang, Y.-C. Chuang, K.-C. Chou, and A.-Y. A. Wu, "BFP-CIM: Runtime Energy-Accuracy Scalable Computing-in-Memory- based DNN Accelerator Using Dynamic Block-Floating-Point Arithmetic," IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), 2024. 2. Y.-C. Chuang, C.-Y. Chang, and A.-Y. A. Wu, "Dynamic-HDC: A Two-Stage Dynamic Inference Framework for Brain-inspired Hyperdimensional Computing," IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2023. 3. C.-Y. Chang, K.-C. Chou, Y.-C. Chuang, and A.-Y. A. Wu, "E-UPQ: Energy-aware Unified Pruning-Quantization Framework for CIM Architecture," IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2023. 4. C.-Y. Chang, Y.-C. Chuang, C.-T. Huang, and A.-Y. A. Wu, "Recent Progress and Development of Hyperdimensional Computing (HDC) for Edge Intelligence," IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2023. 5. Y.-S. Tai, C.-Y. Chang, C.-F. Teng, Y.-T. Chen, and A.-Y. A. Wu, "Joint Optimization of Dimension Reduction and Mixed-Precision Quantization for Activation Compression of Neural Networks," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023. 6. C.-Y.Chang,Y.-C.Chuang,E.-J.Chang,andA.-Y.A.Wu,"MulTa-HDC:AMulti-TaskLearningFrameworkforHyperdimensionalComputing," IEEE Transactions on Computers (TC), 2021. 7. C.-Y. Chang, C.-T. Huang, Y.-C. Chuang, and A.-Y. A. Wu, "BFP-CIM: Data-Free Quantization with Dynamic Block-Floating-Point Arithmetic for Energy-Efficient Computing-In-Memory-based Accelerator," ACM/IEEE Asia and South Pacific Design Automation Conference (ASP- DAC), 2024. 8. C.-T. Huang, C.-Y. Chang, Y.-C. Chuang and A.-Y. A. Wu, "BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory- Computing," ACM/IEEE Design Automation Conference (DAC), 2023. 9. Y.-C. Chen, C.-Y. Chang, and A.-Y. A. Wu, "H-RIS: Hybrid Computing-in-Memory Architecture Exploring Repetitive Input Sharing," IEEE International Symposium on Circuits and Systems (ISCAS), 2023. 10.C.-Y. Chang, Y.-C. Chuang, K.-C. Chou, and A.-Y. A. Wu, "T-EAP: Trainable Energy-Aware Pruning for NVM-based Computing-in-Memory Architecture," IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022. 指導教授 吳安宇 教授 現職 ・ 國立臺灣大學 電機系 / 電子所特聘教授 學歷 ・ Ph.D. in Electrical Engineering, University of Maryland, 1995 ・ M.S. in Electrical Engineering, University of Maryland, 1992 ・ B.S. in Electrical Engineering, National Taiwan University, 1987 經歷 ・ (IEEE 期刊總主編 ) Editor-in-Chief (EiC), IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) (2020~2021) ・ 國立臺灣大學電子所所長 (2016~2019) ・IEEE Fellow (2015~) ・工研院系統晶片中心副主任 (2007~2009) ・Member of Technical Staff, AT&T Bell Labs. / Microelectronics (1995~1996) Taiwan Semiconductor Industry Association ┃台灣半導體產業協會 59 理事長的話 議程與講員簡歷 歷屆理事長重要事蹟與貢獻 TSIA 半導體獎 專題報導 活動報導 附錄